1 400mh z ttl/cmos potato chip po4 9 h s tl 3 8 0 7g 3.3v 1:10 diff e r e ntial to ttl tr a nslator driver feature s : descript i o n : . o p era ti n g f r e q u e n c y u p t o 400m h z w i t h 2p f l o ad . o p era ti n g f r e q u e n c y u p t o 300m h z w i t h 5p f l o ad . o p era ti ng f r e q u e n c y u p t o 250m h z w i t h 15p f l o ad . o p era ti ng f r e q u e n c y u p t o 120m h z w i t h 50p f l o ad . v e r y l o w o u t p u t p i n t o p i n s k e w < 350p s . v e r y l o w p u l s e s k e w < 100 p s . v cc = 1.65 v t o 3 . 6 v . p r opa g a ti o n de l a y < 2.7 n s m a x w i t h 15p f l o ad . l o w i n put capacita n ce: 3p f t y pic a l . 1 : 10 f a n o u t . a v a il a b l e i n 20p i n 15 0 m il w i de q s o p pac k a g e . a v a il a b l e i n 20p i n 30 0 m il w i de s o i c pac k a g e po t a t o s e m i co n d u c t o r ? s p o 49 h s t l 3807 g i s de s i g n ed f o r w o r l d t op per f or m a n ce u s i n g s u b m icr o n cm o s tec h n o l o g y t o ac h i e v e 400m h z t t l o u t p u t f req u e n c y w i t h l e s s t h an 100p s o u t p u t p u l s e s k e w . p o 49 h s t l 3807 g i s a 1 . 6 5 v t o 3.6 v 1 h i g h s p eed c o m p arator i n p u t s t o 10 t t l o u tp u t b u f f ered dr i v er t o ac h i e v e h i g h e r t h a n 400 m h z o u tp u t f r eq u e n c y . t y pical applicatio n s are h s t l , p e c l , lvds t o tt l tra n s l at o r , cr y s tal o r ri n g o s cillat o r, cl o c k a n d s i g n a l d i s tri b u ti o n . pi n co n f i gu r at i on l o gic block diagra m pin de s cription p i n n a m e descr i p t i on s t u p n i - n i , + n i o1 to o10 outputs
2 400mhz ttl/cmos potato chip po49hstl3807g 3.3v 1:10 differential to ttl translator driver maximum ratings dc electrical characteristics symbol description test conditions min typ max unit v oh output high voltage vcc=3v vin=v ih or v il , i oh = -12ma 2.4 3 - v v ol output low voltage vcc=3v vin=v ih or v il , i oh =12ma - 0.3 0.5 v v ih input high voltage guaranteed logic high level (input pin) 2 - vcc v v il input low voltage guaranteed logic low level (input pin) -0.5 - 0.8 v i ih input high current vcc = 3.6v and vin = 3.6v - - 1 ua i il input low current vcc = 3.6v and vin = 0v - - -1 ua v ik clamp diode voltage vcc = min. and i in = -18ma - -0.7 -1.2 v notes: 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable devic e type. 2. typical values are at vcc = 3.3v, 25 c ambient. 3. this parameter is guaranteed but not tested. 4. not more than one output should be shorted at one time. duration of the test should not exceed one sec ond. 5. voh = vcc ? 0.6v at rated current description max unit storage temperature -65 to 150 c operation temperature -40 to 85 c operation voltage -0.5 to +4.6 v input voltage -0.5 to vcc+0.5 v output voltage -0.5 to vcc+0.5 v note: stresses greater than listed under maximum ratings may cause p ermanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied.
3 400mhz ttl/cmos potato chip po49hstl3807g 3.3v 1:10 differential to ttl translator driver power supply characteristics symbol description test conditions (1) min typ max unit icc q quiescent power supply current vcc=max, vin=vcc or gnd - 0.1 30 ua ? icc power supply current per input high vcc=max, vin= vcc-0.6v - 50 300 ua notes: 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable devic e type. 2. typical values are at vcc = 3.3v, 25 c ambient. 3. this parameter is guaranteed but not tested. 4. not more than one output should be shorted at one time. duration of the test should not exceed one second. 5. voh = vcc ? 0.6v at rated current capacitance parameters (1) description test conditions typ max unit cin input capacitance vin = 0v 3 4 p f cout output capacitance vout = 0v - 6 p f notes: 1 this parameter is determined by device characterization but not production tested. switching characteristics symbol description test conditions (1) max unit t plh propagation delay a to bn cl = 15pf 2.7 ns t phl propagation delay a to bn cl = 15pf 2.7 ns tr/tf rise/fall time 0.8v ? 2.0v 0.8 ns tsk(p) pulse skew (same package) cl = 15pf,v+ = 125mhz, v- = 1.5v 0.1 ns tsk(o) output pin to pin skew (same package) cl = 15pf,v+ = 125mhz, v- = 1.5v 0.35 ns tsk(pp) output skew (different package) cl = 15pf,v+ = 125mhz, v- = 1.5v 0.4 ns fmax input frequency cl = 50pf 120 mhz fmax input frequency cl =15pf 250 mhz fmax input frequency cl = 5pf 300 mhz fmax input frequency cl = 2pf 400 mhz notes: 1. see test circuits and waveforms. 2. tplh, tphl, tsk(p), and tsk(o) are production tested. all other parameters guaranteed but not production tested. 3. airflow of 1m/s is recommended for frequencies above 133mhz
4 400mhz ttl/cmos potato chip po49hstl3807g 3.3v 1:10 differential to ttl translator driver test waveforms test circuit ? 50 ? 50
5 400mhz ttl/cmos potato chip po49hstl3807g 3.3v 1:10 differential to ttl translator driver packaging mechanical drawing: 20 pin qsop packaging mechanical drawing: 20 pin soic
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